1. Field of the Invention
The present invention relates to a board for evaluating the characteristics of, for example, a semiconductor device and a method for mounting a semiconductor device thereon.
2. Description of the Related Art
The semiconductor chips are evaluated, by a characteristic evaluation apparatus, for its electric characteristics and, then, a semiconductor chip of given characteristics is mounted on an electronic apparatus. Where the characteristics are evaluated on the characteristic evaluation apparatus, the semiconductor chip is mounted on a carrier for testing. The carrier is mounted in a socket of a characteristic evaluation board connected to the characteristic evaluation apparatus.
In FIGS. 7, 8 and 9, reference numeral 1 shows a semiconductor chip; 2, a carrier for testing; and 3, a board for characteristic evaluation. In the carrier 2 for testing, a plurality of interconnect lines 5 are formed on the upper surface of a substrate 4. The upper surface of the respective interconnect line 5 is covered with a solder resist film 7. Of the respective interconnect lines, those exposed from the solder resist film 7 serve as an electrode 6. Respective bumps 11 on the semiconductor chip 1 are placed on respective electrodes 6 and fixedly bonded by an eutectic solder 8 to the respective electrodes. A connection electrode, not shown, is provided on the testing carrier 2 and connected to the electrode 6.
FIG. 8 shows the structure of the bump 11 and a pad 13 made of aluminum is provided on the rear surface of the semiconductor chip 1. The pad 13 is exposed at an opening of an insulating film 12 and the bump 11 is bonded to the pad 13. The bump 11 is comprised of a high melting point solder and so formed as to have a substantially semi-spherical configuration.
FIG. 9 shows a board for characteristic evaluation. A socket 10 is fixed to a board body 9 of the characteristic evaluation board 3. The testing carrier 2 is bonded to the socket 10. Socket electrodes, not shown, are provided on the socket 10 and connected to a connection electrode, not shown, of the testing carrier 2. These socket electrodes are connected to interconnect circuit lines, not shown, provided on the board body 9.
For the evaluation to be made for the characteristics of the semiconductor chip, the semiconductor chip 1, as an evaluation object is mounted on, and bonded to, the testing carrier 2. As shown in FIG. 8, the bump 11 is bonded to the electrode 6 of the testing carrier by the eutectic solder 8.
Thereafter, the testing carrier 2 with the semiconductor chip 1 bonded thereto is mounted in the socket 10 of the board 3 for characteristic evaluation. The bumps 11 of the semiconductor chip 1 and the electrodes of the interconnect circuit lines on the characteristic evaluation board 3 are electrically connected via the testing carrier 2 and socket 10. In this state, the characteristic of the semiconductor chip 1 is evaluated by a characteristic evaluation apparatus.
After the completion of the evaluation, the semiconductor chip 1 is removed away from the electrode 6 of the testing carrier 2 by melting the eutectic solder 8. The semiconductor chip 1 of desirous characteristics, being so removed, is mounted on a predetermined electronic apparatus and, again, the bump 11 is soldered to the corresponding electrode of the electronic apparatus.
The semiconductor chip 1, being evaluated for its characteristics, is mounted on the electronic apparatus and, for this reason, it is necessary that the semiconductor chip 1 is readily removed from the testing carrier 2. The bump 11 is bonded by the eutectic solder 8 to the corresponding electrode. This is the reason why the bump 11 has to be formed by a solder higher in melting point than the eutectic solder 8. Such a higher melting point solder is poor in wettability compared with the eutectic solder and is are readily liable to be damaged by a thermal stress at its interfacial area. For this reason, it is desirable to form the bumps by the eutectic solder of an excellent characteristic to be mounted on the apparatus, etc. It has been difficult, however, to form such a bump by an eutectic solder.
In the structure as set out above, the testing carrier 2 and socket 10 are necessary for the semiconductor chip 1 to be mounted on the characteristic evaluation board. For this reason, more component parts are required. Since it is necessary to solder the semiconductor chip 1 to the testing carrier and, after evaluation, remove the solder, more operation steps are required. Further, the testing carrier 2 and socket 10 greater in size than the semiconductor chip 1 are required for the semiconductor chip 1 to be mounted on the characteristic evaluation apparatus. As a result, the efficiency with which the chip is mounted on the characteristic evaluation apparatus is lowered.